Pass-driver circuit for two-conductor bus-system

ABSTRACT

A bus driver circuit which permits input of data, which can be identified reliably by modules on the bus line, onto the bus in the event of a short circuit on a conductor in a two-conductor bus system without requiring complicated circuitry is composed of several electrically controllable switches which form an H-bridge configuration, at least one switch being present in each of the five H-bridge branches. The two bus conductors are each connected to one end of the shunt arm of the H-bridge. The individual switches in the longitudinal branches of the H-bridge can be switched to at least two positions which are at different voltage levels.

FIELD OF THE INVENTION

The present invention relates to a bus driver circuit for atwo-conductor bus system connected to a control unit containing the busdriver circuit and multiple actuator modules and/or sensor modules in amotor vehicle, with the bus driver circuit supplying signals in the formof a pulse train formed by different voltage levels into the healthy busconductor in the event of a short circuit on one of the two busconductors.

BACKGROUND INFORMATION

Actuators and sensors are being installed in increasing numbers in motorvehicles to regulate the power train, brake systems, driving performanceand restraint systems for the protection of occupants of the vehicle.Heavy and bulky cable harnesses can be eliminated by introducing bussystems linking together the actuators, the sensors and the respectivecontrol units.

In the case of a bus for a safety-relevant system such as a restraintsystem in particular, measures must be taken so that a fault on the busconductors will not result in a system failure resulting in therestraint systems not being deployed in the event of a crash situation.For such a bus, there is therefore the requirement that signaltransmission must be possible between a central control unit andactuators and/or sensors connected to the bus even in the event of ashort circuit to the battery voltage of the vehicle or to ground on oneof the two bus conductors. For this reason, the German Published PatentApplication No. 198 13 952 describes a bus driver circuit with which itis possible to transmit messages in the form of pulse trains formed bytwo different voltage levels over the intact bus conductor in the eventof a short circuit on one of the two bus conductors. The bus drivercircuit is a series connection of three switches at two differentvoltage potentials.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a bus driver circuitwhich requires the least possible circuitry complexity and permits datato be injected into the bus in such a form that it can be identifiedreliably by the actuator modules and/or sensor modules connected to thebus.

This object is achieved through the fact that the bus driver circuit iscomposed of multiple electrically controllable switches forming anH-bridge configuration, at least one switch being present in each of thefive H-bridge branches, the two bus conductors are each connected to oneend of the shunt arm of the H-bridge, and the individual switches in thelongitudinal branches of the H-bridge can be switched into at least twopositions which are at different voltage levels.

Accordingly, it is expedient that the switches in two longitudinalbranches of the H-bridge, starting from different ends of the shunt arm,can be switched to positions which are at different high voltage levels,and the switches in the two other longitudinal branches can be switchedto positions which are at different low voltage levels. In the event ofa short circuit on one of the two bus conductors, the switches in thelongitudinal branches of the H-bridge that are connected to the healthybus conductor are switched to switch positions so that a desired pulsetrain occurs on the healthy bus conductor. In the event of a shortcircuit in a bus conductor to ground, a switch connected to this busconductor and having a switch position at ground potential is preferablyswitched to this position.

In the case of messages having a high transmission rate, the at leastone switch in the shunt arm is expediently closed briefly betweenswitching through different voltage levels over switches in thelongitudinal branches of the H-bridge. This increases steepness of theedges of the pulses transmitted, thus permitting a high pulsetransmission rate. Messages requiring a high transmission rate include,for example, deployment commands for restraint systems.

The pulse trains transmitted are preferably Manchester encoded, thuspermitting easy synchronization of actuator modules and/or sensormodules.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a circuit diagram of a bus driver and multiple modulesconnected to the bus.

FIG. 2a shows a first possible switching operation of the bus drivercircuit in the case of healthy bus conductors.

FIG. 2b shows a second possible switching operation of the bus drivercircuit in the case of healthy bus conductors.

FIG. 3a shows switching operations of the bus driver circuit in theevent of a short circuit to ground in the first bus conductor.

FIG. 3b shows switching operations of the bus driver circuit in theevent of a short circuit to ground in the second bus conductor.

FIG. 4a shows switching operations of the bus driver circuit in theevent of a short circuit to the battery voltage of the vehicle in thefirst bus conductor.

FIG. 4b shows switching operations of the bus driver circuit in theevent of a short circuit to the battery voltage of the vehicle in thesecond bus conductor.

FIG. 5 shows switching operations of the bus driver circuit in the eventof healthy bus conductors with a very high-speed data transmission.

DETAILED DESCRIPTION

FIG. 1 shows a bus system composed of a two-conductor bus L1 and L2connected to a control unit SE and n actuator modules and/or sensormodules, this figure showing modules M1 and Mn. The two-conductor bussystem illustrated here has a ring structure, for example, i.e., bothends of bus conductors L1 and L2 are connected to control unit SE.

In control unit SE there is a bus driver circuit composed of multipleelectrically controllable switches S1, S2, S3, S4 and S5 forming anH-bridge configuration. In practice, switches S1, . . . , S5, which areidentified with a simple switch symbol, are preferably MOS field-effecttransistors. Instead of switch S1, . . . , S5 shown here, multipleswitches may also be provided in the individual branches of theH-bridge, their switching function optionally depending on the directionof the current flowing through the switch. As indicated by broken lines,individual switches S1, . . . , S5 are controlled by a processor PZ incontrol unit SE. Two bus conductors L1 and L2 are connected to the shuntarm of the H-bridge in which switch S5 is located. First bus conductorL1 is connected to a tie point between the shunt arm having switch S5and the two longitudinal branches having switches S3 and S4 of theH-bridge. Second bus conductor L2 is connected to tie point 2 betweenthe other end of the shunt arm having switch S5 and the two longitudinalbranches having switches S1 and S2. Switches S1, S2, S3 and S4 in thelongitudinal branches of the H-bridge have three different switchpositions 0, I and II. Switch positions I of two switches S1 and S3 inthe two upper parallel longitudinal branches of the H-bridge are at avoltage level U2, and switch positions II of two switches S1 and S3 areat a voltage level U1. Voltage level U1 is between approximately 20 and30 V, for example, and voltage level U2 is a few volts (e.g., 2 V) lowerthan voltage level U1. In their switch positions I, two switches S2 andS4 in the two lower parallel longitudinal branches of the H-bridgeestablish for two bus conductors L1 and L2 a connection of connectionpoints 1 and 2 for the two bus conductors L1 and L2 to a voltage levelU4 having a much lower value than voltage level U1 and preferably beingthe ground potential of 0 V. In switch position II, switches S2 and S4put connection points 1 and 2 of the two bus conductors L1 and L2 at avoltage level U3 a few volts (e.g., 2 V) above lowest voltage level U4.

FIGS. 2a and 2 b show how processor PZ controls individual switches S1,. . . , S5 of the H-bridge to transmit a message to modules M1, Mn whenboth bus conductors L1 and L2 are healthy, i.e., there is no shortcircuit. Messages sent out over the bus by control unit SE to modules M1through Mn are in the form of a pulse train made up of two differentvoltage levels, a high differential voltage ΔU between two busconductors L1 and L2 corresponding to a logical 1, and a lowdifferential voltage ΔU corresponding to a logical 0. The bottom portionof each of FIGS. 2a and 2 b shows a curve for differential voltage ΔUbetween two bus conductors L1 and L2 when a bit string 10101, forexample, is to be transmitted. The high level of differential voltageΔU, which corresponds to a logical 1, arises from the difference betweenthe two voltage levels U1 and U4, and low differential voltage level ΔUcorresponds to the difference between the two voltage levels U2 and U3.The two differential voltage levels ΔU=U1−U4 and ΔU=U2−U3 thus occureither due to the fact that two switches S2 and S3, which are connectedto bus conductors L1 and L2 as shown in FIG. 2a , or switches S1 and S4,which are also connected to the two bus conductors L1 and L2, arecontrolled in common mode. To form higher differential voltage levelsΔU=U1−U4, either switch S2 is switched to position I and switch S3 isswitched to position II (FIG. 2a ) or switch S1 is switched to switchposition II and switch S4 is switched to switch position I (FIG. 2b ).The lower differential voltage level ΔU=U2−U3 occurs due to the factthat either switch S2 is switched to switch position II and switch S3 isswitched to switch position I (FIG. 2a ) or switch S1 is switched toswitch position I and switch S4 is switched to switch position II (FIG.2b ). FIGS. 2a and 2 b illustrate how a symmetrical voltage modulationin phase opposition is produced on bus conductors L1 and L2, thusminimizing any possible emission of interference signals.

All the other switches except for switches S2 and S3 or S1 and S4 remainin their switch position 0, so that no voltage potential at all flowsover them to bus conductors L1 and L2.

Because of severe mechanical loads, in particular in the course of anaccident, one of two bus conductors L1 or L2 may become short circuitedto ground or to battery voltage. It is very important for asafety-relevant device such as a restraint system to have communicationbetween the control unit and the actuator modules and/or sensor modulesM1, Mn even in the event of such a short circuit on one of the two busconductors L1, L2. In the case of a restraint system, communicationbetween control unit SE and modules M1, Mn connected to bus conductorsL1, L2 is composed of a diagnostic inquiry directed by control unit SEto individual modules M1, Mn and—in the event of a crash—commands fordeployment of the restraint systems (airbags, seat-belt tighteningsystems, etc.) controlled by modules M1, Mn.

If the bus driver circuit is to be controllable by processor PZ in amanner suitable for signal transmission over the bus in the event of ashort circuit, it is to have an arrangement for detecting whether and onwhich of the two bus conductors L1, L2 there is a short circuit. Suchshort-circuit detection is known from German Published PatentApplication No. 195 09 133, for example. Details of this short-circuitdetection, which is essentially known per se, will not be presented herebecause they are not included in the object of the present invention.

FIG. 3a shows how switches S1, . . . , S5 of the H-bridge are to becontrolled in the event of a short circuit to ground in bus conductor L1if a bit string 10101, for example, is to be transmitted to modules M1,Mn. A logical 1 appears due to the fact that switch S1, connected to busconductor L2, which is not short-circuited, is switched to switchposition II, and switch S2, which is also connected to bus conductor L2,is switched to switch position 0. Then bus conductor L2 is at voltageU1, and thus a voltage difference ΔU=U1 exists between conductor L2 andconductor L1, which is short-circuited to ground. If a logical 0 is tobe transmitted, switch S1 is switched into switch position 0 and switchS2 is switched into switch position II. Then conductor L2 is at voltagelevel U3, and there is a voltage difference ΔU=U3 between conductor L2and conductor L1 which is short-circuited to ground. It is expedient tokeep switch S4 constantly in switch position I in order to thus keepshort-circuited conductor L1 fixedly at potential U4=0 V correspondingto the ground potential. However, switch S4 may also be kept in switchposition 0. Other switches S3 and S4 also assume switch position 0permanently.

FIG. 3b shows the switch positions for the case when conductor L2 isshort-circuited to ground. To transmit a logical 1 over the bus here,switch S3 is brought into switch position II, and switch S4 is broughtinto switch position 0. Then conductor L1 is at voltage level U1. Adifferential voltage ΔU=U1 is now applied between conductor L1 andconductor L2, which is short-circuited to ground. A logical 0 occurs dueto the fact that switch S3 is switched into switch position 0, andswitch S4 is switched into switch position II. A voltage difference ofΔU=U3 then exists between two conductors L2 and L1. Switch S2 can beswitched permanently to switch position I, so that conductor L2 which isshort-circuited to ground is kept at potential U4, which amounts to 0 Vand therefore corresponds to the ground potential. Other switches S1 andS5 are kept permanently in switch position 0. FIG. 4a shows the switchpositions of switches S1, . . . , S5 for the case when first busconductor L1 is short-circuited to battery voltage UB of the vehicle.Switch S1 is switched to switch position II, and switch S2 is switchedto switch position 0 for transmission of a logical 1. Then adifferential voltage ΔU=UB−U1 exists between conductor L2 and conductorL1, which is short-circuited to battery voltage UB. A logical 0 occursbecause switch S1 is switched to switch position 0 and switch S2 isswitched to switch position II. The differential voltage then existingbetween conductors L1 and L2 amounts to ΔU=UB−U3. The other switches S3,S4 and S5 remain in switch position 0.

FIG. 4b shows the switch positions for the case when second busconductor L2 is short-circuited to battery voltage UB. A logical 1occurs here because switch S3 is switched to switch position II andswitch S4 is switched to switch position 0. A differential voltageΔU=UB−U1 then exists between two conductors L1 and L2. A logical 0occurs on the bus because switch S3 is switched to switch position 0 andswitch S4 is switched to switch position II. In this case, adifferential voltage ΔU=UB−U3 exists between conductors L1 and L2.Switches S1, S2 and S5 remain in switch position 0.

If a message is to be transmitted at the highest possible rate over thebus to individual modules M1, Mn, e.g., an ignition command at a bitrate of 125 kbit/s, then switch S5 in the shunt arm of the H-bridge isswitched briefly into switch position I between switching through twodifferent voltage levels as illustrated in FIG. 5, thus brieflyconnecting two bus conductors L1 and L2 and thus bringing them both tothe same voltage potential. FIG. 5 shows as an example transmission of amessage over the bus when both bus conductors L1 and L2 are healthy,i.e., there is no short circuit. FIG. 5 illustrates clearly that switchS5 is closed briefly when both switches S2 and S3 are switched fromswitch position I to switch position II and vice versa. This measureachieves the result that the individual signal pulse edges have agreater steepness, and therefore a higher bit rate is possible.Especially in the case of signals having a high voltage range such asdeployment commands, a greater edge steepness is used to achieve a highbit rate.

It is expedient to transmit the messages with the known Manchester IIcode because it permits transmission with the lowest possiblesusceptibility to fault and also guarantees easy synchronization ofmodules M1, Mn.

Modules M1, Mn each have electronic controls SE1, SEn. If modules M1, Mnare actuator modules, then electronic controls SE1, SEn have thefunction of controlling the deployment of the restraint devicesconnected to modules M1, Mn. Electronic controls SE1, SEn may also havea fault diagnostic function for the circuitry arrangement present inmodules M1, Mn and the respective deployment devices of the restraintarrangement. Likewise, electronic controls SE1, SEn are also responsiblefor controlling a longitudinal switch SM1, SMn. If both bus conductorsL1, L2 are short-circuited together at one location or if they havesimultaneous short circuits to ground and to battery voltage, then thelongitudinal switches in the modules directly adjacent to thisshort-circuit site are opened. If the bus is a ring, as illustrated inFIG. 1, then data and power can be transmitted from control unit SE toall modules M1, Mn despite such a short circuit, because data and powercan be transmitted in both directions (to the right and to the left) ona ring bus.

If the power supply for electronic controls SE1, SEn in modules M1, Mntravels over the bus from control unit SE, then a bridge rectifiercomposed of a diode ring GR11 and GR12, GRn1 and GRn2 is connectedbetween two bus conductors L1 and L2 on both sides of longitudinalswitch SM1, SMn. It is thus possible to obtain a d.c. power supplyvoltage for electronic controls SE1, SEn from the data signaltransmitted over the bus conductor, regardless of the direction in whichthis data signal is transmitted on the bus conductor.

A capacitor C1, Cn functioning as an energy buffer in the transmissionof signals (deployment commands) having a high voltage range isconnected upstream from each electronic control SE1, SEn.

What is claimed is:
 1. A bus driver circuit for a two-conductor bus system to which are connected a control unit containing the bus driver circuit and at least one of a plurality of actuator modules and a plurality of sensor modules in a motor vehicle, the bus driver circuit feeding a pulse train signal formed by different voltage levels into a healthy bus conductor of the two-conductor bus system in the event of a short circuit on one of the two bus conductors, the bus driver circuit comprising: a plurality of electrically controllable switches forming an H-bridge configuration containing five H-bridge branches, wherein: at least one of the plurality of electrically controllable switches is present in each of the five H-bridge branches, the two bus conductors are each connected to one end of a shunt arm of the H-bridge configuration, and individual ones of the plurality of electrically controllable switches in longitudinal branches of the H-bridge configuration are switchable to at least two positions that are at different voltage levels.
 2. The bus driver circuit according to claim 1, wherein: a first set including two of the plurality of electrically controllable switches can be switched into two of the at least two positions that are at high but different voltage levels in two longitudinal branches of the H-bridge configuration originating from different ends of the shunt arm, and a second set including two other ones of the plurality of electrically controllable switches in two other longitudinal branches of the H-bridge can be switched to positions which are at different low voltage levels.
 3. The bus driver circuit according to claim 2, wherein: if a short circuit occurs on one of the two bus conductors, the control unit causes the electrically controllable switches in one of the first set and the second set in respective longitudinal branches of the H-bridge configuration which are connected to the healthy bus conductor to be switched into switch positions so that a desired pulse train is generated on the healthy bus conductor.
 4. The bus driver circuit according to claim 3, wherein: if a short circuit to ground occurs in the two-bus conductor system, one of the plurality of electrically programmable switches connected to the two-bus conductor system and having a switch position at ground potential is switched into the switch position at ground potential.
 5. The bus driver circuit according to claim 1, wherein: at least one of the plurality of electrically controllable switches is disposed in the shunt arm and is closed briefly between a switching through of different voltage levels over remaining ones of the plurality of electrically controllable switches in the longitudinal branches of the H-bridge configuration.
 6. The bus driver circuit according to claim 1, wherein: the pulse train signal is transmitted as a Manchester encoded pulse train signal. 